[Ksummit-2012-discuss] [ATTEND] Architecture support (ARM), I/O accessors, memory ordering

Catalin Marinas catalin.marinas at arm.com
Wed Jun 20 14:43:26 UTC 2012


Hi,

I would very much like to attend this year's kernel summit. I am one of
the core ARM kernel developers responsible for the contribution of
latest ARM architecture features (ARMv7, LPAE). I'm also the lead
developer and maintainer of the (yet to be released) 64-bit ARM
architecture (AArch64) Linux port. Apart from the ARM architecture
contributions, I develop and maintain kmemleak (kernel memory leak
detector).

One of my topics of interest is clarification across other architectures
of the memory ordering requirements for the I/O accessors. We have
strongly ordered read?/write?() and that's clear. But some architectures
(though not all) also define read?_relaxed() or write?_relaxed() and
it's not entirely clear how weakly ordered these could be. If the
relaxed accessors are to be used by device drivers (for performance
reasons), are new I/O-specific barriers needed? There have been threads
in the past (like http://thread.gmane.org/gmane.linux.ide/46414) but
without a definitive outcome.

Another discussion I'd like to attend is the breakout session proposed
by Grant on ACPI on ARM (especially from a 64-bit perspective).

And, of course, any process-improvement topic is always of interest to
people in the ARM community, given the amount of code that gets
contributed.

Thanks.

-- 
Catalin


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